3C90B 3C90C 8k MII Bug

[Steve_Marfisi@3com.com]

The bug was that the 3C905B with the Lucent chipset and some early prototypes
ofthe 3C905C didn't map contents of the ROM properly - the ROM was remapped to
the shadow memory after every 4K, not  8K as is commonly thought. Even the  ROM
couldn't be properly read directly using ASIC I/O access to the ROM - it
produced the same remapping problem. Forcing the ASIC into MII mode solved the
problem, but it was required that one restored the ASIC to  its original setup
afterwards.

The early revisions of 3C905C did have this bug too, that was what the loader
patch was about.  Later revisions of 3C905C do not have this bug - last summer
we changed the patch - we now skip the workaround for 3C905C and continue to
apply it for the 3C905B.

Here is a brief summary of what has been done to the >4K loader problem in
3C905B with Lucent ASIC:

As the first 2K of loader is remapped in UMB after 4K, it was suggested  to
checksum this 2K properly in order for the BIOS at least not to produce checksum
error and recognize the ROM. Then replace last 2K with the proper code from
PCI-mapped extended memory during the autoscan time. The idea of checksumming
works well.The last 2K of 6K loader code was copied properly from extended
memory using Int15 copy  function and was executed properly in autoscan time.
But the ROM  was never shown in BBS boot order afterwards. We experimented a lot
and found that Int15 is the reason. Even if you apply some dummy copy like copy
2 bytes to the location far away from our 4K target (using a Broadcom chipset
which operates properly ) the ROM never showed up. Probably the transition to
protected mode in Int15 affects subsequent BIOS execution. We applied IO-based
copy using 3C905B registers and it works fine. The ROM is visible for the BBS
BIOS and operates properly. When copying the last 2K of the loader the Lucent
Hurricane has to be put in MII mode too,  because even reading BiosROM using
registers gives the wrong location of the chip when not put in MII mode. But
that is performed during run time and doesn't affect permanent EEPROM settings



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